News
Intel and HP Reveal IA-64 Architecture for Developers
- By Scott Bekker
- 05/26/1999
In an effort to get the software industry moving on developing applications for Merced, Intel Corp. and Hewlett-Packard Co. held a press conference detailing the IA-64 Instruction Set Architecture (ISA).
Intel and HP allied in 1994 to develop a 64-bit instruction set architecture for advanced workstation, server and enterprise-computing systems that is compatible with Intel’s IA-32 processors and HP’s PA-RISC processors. IA-64 is designed to meet the needs of the Internet economy, growing memory demands and performance requirements of future data warehousing, e-business and other server and workstation applications.
"Making the IA-64 architecture information publicly available now supports the continued adoption of the IA-64 platform as we move closer to Merced production in 2000," said Albert Yu, senior vice president and general manager of Intel’s microprocessor products group.
The IA-64 architecture will use a new technology called EPIC (Explicitly Parallel Instruction Computing) based on a combination of computer architecture concepts called speculation, predication and explicit parallelism.
The IA-64 architecture uses explicit information about instruction grouping, pre-fetching, predication and speculative execution to help overcome the limitations of today’s RISC architectures.
IA-64 processors will have enhanced computing resources including 128 integer registers, 128 floating-point registers, and 64 predicate registers along with a number of special-purpose registers. Instructions will be bundled in groups for parallel execution by the various functional units. The instruction set has been optimized to address the needs of cryptography, video encoding and other functions that will be increasingly needed by the next generation of servers and workstations. Additionally, support for Intel’s MMX technology and Internet Streaming SIMD Extensions is maintained and extended in IA-64 processors.
The IA-64 AIG describes IA-64 architecture compatibility with Intel’s IA-32 instructions in processor hardware and with HP’s PA-RISC instructions through software translation, providing investment protection for today’s existing applications and software infrastructure. – Thomas Sullivan
About the Author
Scott Bekker is editor in chief of Redmond Channel Partner magazine.