News

Intel’s Roadmap – Confusing But On Track

• By Stuart J. Johnston
• 10/18/2005

A little more than a year ago, Intel gave customers and analysts a peek at its roadmap for both the Xeon and Itanium 2 architectures. This month, at an event highlighted by an appearance by legendary comedian Carl Reiner, executives of Santa Clara, Calif.-based Intel gave a status update that basically has them on track.

The company marked the occasion by announcing it is shipping the first dual-core, Hyper-Threaded Xeon processor for dual-processor servers – as promised in August. While Intel moved the deliveries up from early next year, that is still six months after AMD shipped its first dual-core server processors.

Reiner was hired for the occasion because he co-wrote and directed the classic comedy film, “The Man with Two Brains,” starring Steve Martin and Kathleen Turner. But like Reiner’s monologue, which wandered seemingly aimlessly as he appeared to be searching for a theme that somehow tied his famous film’s premise with dual-core technology, the roadmap update presented by Intel’s executives was confusing as much for all of its cryptic codenames as for the features and technologies to come with each new CPU.

In fact, the simplest part is that Intel officials said they are on track to deliver a multiprocessor (MP) version of the dual-core Xeon that supports up to four processors within the next two months.

The new server CPU delivered this week is the first “Paxville” chip and is designed for use in dual-processor (DP) configurations. It runs at 2.8 GHz and costs $1,043 in 1,000-unit quantities. Pricing for the MP processor was not disclosed.

Dual-core processors provide two complete CPUs on a single chip, basically functioning as if the computer had two processors instead of one. Intel's Xeon processors also include Intel's Hyper-Threading technology which enables a single core to execute two threads simultaneously. Additionally, all the new Xeon chips support Intel’s EM64T 64-bit memory addressing technology.

Thus, at least theoretically, a two-CPU machine powered by Paxville processors could provide the raw computing power of a current eight-processor design. In reality, only some software loads can take advantage of Hyper-Threading. Still, Intel claims a performance increase, when compared to existing single-core processors, of up to 50 percent for the Paxville DP Xeon that just shipped and up to 60 percent for the forthcoming MP version of the chip.

Intel is also migrating to smaller and smaller production technologies, as it simultaneously aims to reduce heat leakage and power requirements, while continuing to improve performance. This becomes especially significant as Intel and competitor AMD move to four-core, -- also referred to as “quad-core” -- processors and beyond.

The existing Xeon processors are based on 90-nanometer manufacturing technology. Next year, Intel is looking to ship the first Xeon chips based on its new 65-nm technology. And in late July, the company announced it has started planning for a new 45-nm wafer fab to begin large-scale production in 2007.

First, however, Intel aims to deliver the second Paxville processor, the Dual-core Xeon 7000 MP series CPU, before the end of the year. That CPU is slated to run at speeds up to 3 GHz and can be used in configurations of up to 32 processors per server. A new chipset in the “Twincastle” line, officially named the Intel E8501 chipset, will support the 7000’s 800/667 MHz dual-independent front-side bus.

That processor will be upgraded in the second half of 2006 with the “Tulsa” CPU, which will be based on 65-nm technology. Intel is also planning to ship a dual-core version of its Itanium 64-bit CPUs for high-end computing by year’s end.

Officials also reiterated that the company has more than 15 multi-core projects under way with more than ten of those being “at least” quad-core.

The proliferation of codenames reflects the multitude of new processors and new chipmaking technologies Intel has in progress as well as its recent orientation towards viewing a chip “platform” as a combination of elements that include the processor, but also include specific support chipsets and memory technologies.

For instance, early next year, Intel plans to deliver a new server platform, codenamed "Bensley," that consists of a dual-core Intel Xeon processor codenamed "Dempsey," and a chipset, codenamed “Blackford.” Bensley will include support for Fully Buffered Dual In-line Memory Module (FB-DIMM) technology, and a front-side bus speed of 1066 Mhz.

Officials said they expect that 85 percent of all server CPU shipments by the close of 2006 will be multi-core processors, and that number will increase to 100 percent by the end of 2007.